As integrated circuit (IC) technologies evolve, ICs tend to move toward finer geometries and toward integrating more functionality into a single semiconductor die. For example, a wireless communications device may include a multi-band transceiver system-on-a-chip (SoC) that may integrate micro-controller functionality, memory, system interfaces, baseband processing, analog-to-digital and digital-to-analog conversion, digital filtering, RF receive down-conversion circuitry, and RF transmitter modulation and amplification circuitry into a single multi-band SoC semiconductor die. The integration of digital signals, RF receive signals, RF local oscillator (LO) signals, and RF transmit signals into a single die is challenging in the face of RF transmit linearity, spur, noise, and power consumption requirements.
The multi-band SoC semiconductor die may be combined with a multi-band RF front-end module (FEM) to provide the wireless communications device. The multi-band RF FEM may include, a multi-band RF power amplifier (PA) module, multi-band RF receive circuitry, and multi-band RF switch circuitry. A typical multi-band SoC semiconductor die may have an RF transmit output power requirement of about +3 dBm (decibel milliwatt), a 1 dB (decibel) output compression point (OP1 dB) requirement of about +9 dBm, and a receive band noise floor requirement of about −159 dB with respect to the carrier (dBc) per Hertz (Hz). Further, as the geometries of SoC semiconductor dies evolve from 90 nanometer (nm) technology toward 65 nm and 32 nm technologies, meeting the RF transmit linearity, spur, noise, and power consumption requirements may be extremely challenging due to hostile spur environments of SoC architectures and low breakdown voltages of 65 nm and 32 nm transistors. Thus, there is a need to provide a wireless communications device having a multi-band SoC semiconductor die that meets RF transmit output power and linearity, spur, noise, and power consumption requirements.